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CODES
2007
IEEE
14 years 1 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
JGAA
2007
124views more  JGAA 2007»
13 years 7 months ago
Simultaneous Border Segmentation of Doughnut-Shaped Objects in Medical Images
Image segmentation with specific constraints has found applications in several areas such as biomedical image analysis and data mining. In this paper, we study the problem of sim...
Xiaodong Wu, Michael B. Merickel
PPOPP
2010
ACM
14 years 4 months ago
Scheduling support for transactional memory contention management
Transactional Memory (TM) is considered as one of the most promising paradigms for developing concurrent applications. TM has been shown to scale well on multiple cores when the d...
Walther Maldonado, Patrick Marlier, Pascal Felber,...
ISPD
2010
ACM
163views Hardware» more  ISPD 2010»
14 years 2 months ago
A statistical framework for designing on-chip thermal sensing infrastructure in nano-scale systems
Thermal/power issues have become increasingly important with more and more transistors being put on a single chip. Many dynamic thermal/power management techniques have been propo...
Yufu Zhang, Bing Shi, Ankur Srivastava
EGITALY
2006
13 years 8 months ago
Easy Access to Huge 3D Models of Works of Art
Automatic shape acquisition technologies evolved rapidly in recent years, and huge mass of 3D data can be easily produced. The high accuracy of range scanning technology makes the...
Marco Callieri, Federico Ponchio, Paolo Cignoni, R...