Sciweavers

697 search results - page 35 / 140
» Strategies to Parallelize ILP Systems
Sort
View
IPPS
2000
IEEE
14 years 27 days ago
Exploring the Switch Design Space in a CC-NUMA Multiprocessor Environment
The switch design for interconnection networks plays an important role in the overall performance of multiprocessors and computer networks. It is therefore crucial to study variou...
Marius Pirvu, Nan Ni, Laxmi N. Bhuyan
HPCA
1999
IEEE
14 years 24 days ago
The Synergy of Multithreading and Access/Execute Decoupling
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
Joan-Manuel Parcerisa, Antonio González
TPDS
2010
144views more  TPDS 2010»
13 years 6 months ago
Performance Evaluation of Dynamic Speculative Multithreading with the Cascadia Architecture
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
David A. Zier, Ben Lee
BMCBI
2011
13 years 3 months ago
A discriminative method for family-based protein remote homology detection that combines inductive logic programming and proposi
Background: Remote homology detection is a hard computational problem. Most approaches have trained computational models by using either full protein sequences or multiple sequenc...
Juliana S. Bernardes, Alessandra Carbone, Gerson Z...
IPPS
1995
IEEE
14 years 1 days ago
The RACE network architecture
The RACE R parallel computer system provides a highperformance parallel interconnection network at low cost. This paper describes the architecture and implementation of the RACE ...
Bradley C. Kuszmaul