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118
Voted
FPGA
2005
ACM
80views FPGA» more  FPGA 2005»
15 years 8 months ago
Simultaneous timing-driven placement and duplication
Logic duplication is an effective method for improving circuit performance. In this paper we present an algorithm named SPD that performs simultaneous placement and duplication to...
Gang Chen, Jason Cong
96
Voted
FPGA
2005
ACM
137views FPGA» more  FPGA 2005»
15 years 8 months ago
HARP: hard-wired routing pattern FPGAs
Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...
Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia...
126
Voted
SAMOS
2004
Springer
15 years 8 months ago
A Novel Data-Path for Accelerating DSP Kernels
A high-performance data-path to implement DSP kernels is proposed in this paper. The data-path is based on a flexible, universal, and regular component to optimally exploiting both...
Michalis D. Galanis, George Theodoridis, Spyros Tr...
117
Voted
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
15 years 7 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
FPL
2009
Springer
99views Hardware» more  FPL 2009»
15 years 7 months ago
Exploiting fast carry-chains of FPGAs for designing compressor trees
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne