We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
Abstract--This paper shows an implementation of CANSCID (Combined Architecture for Stream Categorization and Intrusion Detection). To satisfy the required system throughput, the pa...
We discuss an imaging architecture for sensor pixel in the ALOHA signals an event when a certain amount network applications, that employs a 32 x 32 Address-Event of photons are re...
Thiago Teixeira, Eugenio Culurciello, Andreas G. A...
This paper presents a general model for estimating access times of serpentine tape drives. The model is used to schedule I/O requests in order to minimize the total access time. W...
The Discrete Wavelet Transform is a proven tool for a wide range of database applications. However, despite broad acceptance, some of its properties have not been fully explored a...
Mehrdad Jahangiri, Dimitris Sacharidis, Cyrus Shah...