871 search results - page 155 / 175 » Streaming Reduction Circuit |
FPGA
2006
ACM
14 years 1 months ago
2006
ACM
The high unit cost of FPGA devices often deters their use beyond the prototyping stage. Efforts have been made to reduce the part-cost of FPGA devices, resulting in the developmen...
FPGA
2000
ACM
14 years 1 months ago
2000
ACM
In this paper we introduce a new Simulated Annealingbased timing-driven placement algorithm for FPGAs. This paper has three main contributions. First, our algorithm employs a nove...
ASPDAC
2008
ACM
13 years 12 months ago
2008
ACM
This paper proposes a novel Behavioral Synthesis method that improves performance of synthesized circuits utilizing specialized functional units effectively. Specialized functional...
CHES
2008
Springer
13 years 12 months ago
2008
Springer
Dynamically reconfigurable systems are known to have many advantages such as area and power reduction. The drawbacks of these systems are the reconfiguration delay and the overhead...
CF
2005
ACM
13 years 11 months ago
2005
ACM
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...