871 search results - page 98 / 175 » Streaming Reduction Circuit |
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
ASPDAC
2005
ACM
14 years 9 days ago
2005
ACM
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...
TCAD
2008
13 years 10 months ago
2008
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
ICIP
2000
IEEE
14 years 12 months ago
2000
IEEE
Two algorithms are presented for the detection of gradual transitions in video sequences. The first is a dissolve detection algorithm utilizing certain properties of a dissolve�...
ENTCS
2007
13 years 10 months ago
2007
The implementation of conceptually continuous signals in functional reactive programming (FRP) is studied in detail. We show that recursive signals in standard implementations usi...