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DATE
2007
IEEE
174views Hardware» more  DATE 2007»
14 years 1 months ago
ATLAS: a chip-multiprocessor with transactional memory support
Chip-multiprocessors are quickly becoming popular in embedded systems. However, the practical success of CMPs strongly depends on addressing the difficulty of multithreaded appli...
Njuguna Njoroge, Jared Casper, Sewook Wee, Yuriy T...
FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 1 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
ACMMSP
2006
ACM
250views Hardware» more  ACMMSP 2006»
14 years 21 days ago
What do high-level memory models mean for transactions?
Many people have proposed adding transactions, or atomic blocks, to type-safe high-level programming languages. However, researchers have not considered the semantics of transacti...
Dan Grossman, Jeremy Manson, William Pugh
CACM
2008
100views more  CACM 2008»
13 years 6 months ago
TxLinux and MetaTM: transactional memory and the operating system
TxLinux is the first operating system to use hardware transactional memory (HTM) as a synchronization primitive, and the first to manage HTM in the scheduler. TxLinux, which is a ...
Christopher J. Rossbach, Hany E. Ramadan, Owen S. ...
ASPLOS
2011
ACM
12 years 10 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...