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IEEEPACT
2006
IEEE
14 years 2 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
IUI
2010
ACM
14 years 3 months ago
Lowering the barriers to website testing with CoTester
In this paper, we present CoTester, a system designed to decrease the difficulty of testing web applications. CoTester allows testers to create test scripts that are represented ...
Jalal Mahmud, Tessa Lau
VTS
2008
IEEE
104views Hardware» more  VTS 2008»
14 years 3 months ago
Signature Rollback - A Technique for Testing Robust Circuits
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
Uranmandakh Amgalan, Christian Hachmann, Sybille H...
MBEES
2008
13 years 10 months ago
Composition of Model-based Test Coverage Criteria
: In this paper, we discuss adjustable coverage criteria and their combinations in model-based testing. We formalize coverage criteria and specify test goals using OCL. Then, we pr...
Mario Friske, Bernd-Holger Schlingloff, Stephan We...
DFT
2009
IEEE
189views VLSI» more  DFT 2009»
14 years 3 months ago
Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
Meng Zhang, Anita Lungu, Daniel J. Sorin