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MICRO
2003
IEEE
106views Hardware» more  MICRO 2003»
14 years 29 days ago
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, P...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 2 months ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
PVM
2009
Springer
14 years 2 months ago
Optimizing MPI Runtime Parameter Settings by Using Machine Learning
Abstract. Manually tuning MPI runtime parameters is a practice commonly employed to optimise MPI application performance on a specific architecture. However, the best setting for ...
Simone Pellegrini, Jie Wang, Thomas Fahringer, Han...
WWW
2011
ACM
13 years 2 months ago
Towards liquid service oriented architectures
The advent of Cloud computing platforms, and the growing pervasiveness of Multicore processor architectures have revealed the inadequateness of traditional programming models base...
Daniele Bonetta, Cesare Pautasso
ADAEUROPE
2010
Springer
14 years 15 days ago
AdaStreams: A Type-Based Programming Extension for Stream-Parallelism with Ada 2005
Because multicore CPUs have become the standard with all major hardware manufacturers, it becomes increasingly important for ing languages to provide programming abstractions that ...
Gingun Hong, Kirak Hong, Bernd Burgstaller, Johann...