198 search results - page 33 / 40 » Supporting Cache Coherence in Heterogeneous Multiprocessor S... |
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
ISCA
1998
IEEE
13 years 12 months ago
1998
IEEE
Commercial applications such as databases and Web servers constitute the largest and fastest-growing segment of the market for multiprocessor servers. Ongoing innovations in disk ...
ASPLOS
2000
ACM
14 years 4 hour ago
2000
ACM
This paper describes the architecture and implementation of the AlphaServer GS320, a cache-coherent non-uniform memory access multiprocessor developed at Compaq. The AlphaServer G...
CCECE
2006
IEEE
14 years 1 months ago
2006
IEEE
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Solid frameworks and toolkits for design and analysis of embedded systems are of high importance, since they enable early reasoning about critical properties of a system. This pap...