198 search results - page 7 / 40 » Supporting Cache Coherence in Heterogeneous Multiprocessor S... |
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
Both commercial and scientific workloads benefit from concurrency and exhibit data sharing across threads/processes. The resulting sharing patterns are often fine-grain, with t...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
LCR
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. As an alternative to message passing, Rochester's InterWeave system allows the programmer to map shared segments into programs spread across heterogeneous, distribut...
ISCA
1998
IEEE
13 years 12 months ago
1998
IEEE
Most large shared-memory multiprocessors use directory protocols to keep per-processor caches coherent. Some memory references in such systems, however, suffer long latencies for ...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...