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» Supporting Runtime Reconfiguration on Network Processors
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DSD
2009
IEEE
105views Hardware» more  DSD 2009»
14 years 1 months ago
Design of a Highly Dependable Beamforming Chip
—As CMOS process technology advances towards 32nm, SoC complexity continuously grows but its dependability significantly decreases. In this paper, a beamforming chip 1 is designe...
Xiao Zhang, Hans G. Kerkhoff
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
14 years 1 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
MOBICOM
1997
ACM
13 years 10 months ago
Dynamic Network Reconfiguration Support for Mobile Computers
Hot swapping technology combined with pervasive heterogeneous networks empowers mobile laptop users to select the best network device for their current environment. Unfortunately,...
Jon Inouye, Jim Binkley, Jonathan Walpole
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
14 years 1 months ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...
FPL
2009
Springer
179views Hardware» more  FPL 2009»
13 years 11 months ago
Building heterogeneous reconfigurable systems using threads
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a software-like...
Jason Agron, David L. Andrews