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CODES
2008
IEEE
14 years 3 months ago
SPaC: a symbolic pareto calculator
The compositional computation of Pareto points in multi-dimensional optimization problems is an important means to efficiently explore the optimization space. This paper presents ...
Hamid Shojaei, Twan Basten, Marc Geilen, Phillip S...
DATE
1999
IEEE
123views Hardware» more  DATE 1999»
14 years 1 months ago
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs
This paper reports a formal methodology for verifying a broad class of synthesized register-transfer-level (RTL) designs by accommodating various register allocation/optimization ...
Nazanin Mansouri, Ranga Vemuri
CAV
2009
Springer
184views Hardware» more  CAV 2009»
14 years 9 months ago
Monotonic Partial Order Reduction: An Optimal Symbolic Partial Order Reduction Technique
Abstract. We present a new technique called Monotonic Partial Order Reduction (MPOR) that effectively combines dynamic partial order reduction with symbolic state space exploration...
Vineet Kahlon, Chao Wang, Aarti Gupta
TC
2010
13 years 3 months ago
Reconfigurable Hardware Implementations of Tweakable Enciphering Schemes
Tweakable enciphering schemes are length preserving block cipher modes of operation that provide a strong pseudo-random permutation. It has been suggested that these schemes can b...
Cuauhtemoc Mancillas-López, Debrup Chakrabo...
NSDI
2010
13 years 6 months ago
AccuRate: Constellation Based Rate Estimation in Wireless Networks
This paper proposes to exploit physical layer information towards improved rate selection in wireless networks. While existing schemes pick good transmission rates, this paper tak...
Souvik Sen, Naveen Santhapuri, Romit Roy Choudhury...