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DAC
2003
ACM
15 years 7 months ago
Low-power design methodology for an on-chip bus with adaptive bandwidth capability
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
137
Voted
CSCW
2006
ACM
15 years 4 months ago
CVS integration with notification and chat: lightweight software team collaboration
Code management systems like Concurrent Version System (CVS) can play an important role in supporting coordination in software development, but often at some time removed from ori...
Geraldine Fitzpatrick, Paul Marshall, Anthony Phil...
118
Voted
ASPLOS
2006
ACM
15 years 8 months ago
Introspective 3D chips
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexit...
Shashidhar Mysore, Banit Agrawal, Navin Srivastava...
156
Voted
ISSTA
2012
ACM
13 years 5 months ago
Static detection of brittle parameter typing
To avoid receiving incorrect arguments, a method specifies the expected type of each formal parameter. However, some parameter types are too general and have subtypes that the me...
Michael Pradel, Severin Heiniger, Thomas R. Gross
228
Voted
ASPLOS
2009
ACM
16 years 3 months ago
Mixed-mode multicore reliability
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...