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» Symbolic system level reliability analysis
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EXPCS
2007
13 years 11 months ago
Empirical performance assessment using soft-core processors on reconfigurable hardware
Simulation has been the de facto standard method for performance evaluation of newly proposed ideas in computer architecture for many years. While simulation allows for theoretica...
Richard Hough, Praveen Krishnamurthy, Roger D. Cha...
LCTRTS
2010
Springer
14 years 10 days ago
Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul
HICSS
2012
IEEE
324views Biometrics» more  HICSS 2012»
12 years 3 months ago
Extending BPMN for Business Activity Monitoring
—Real-time access to key performance indicators is necessary to ensure timeliness and effectiveness of operational business processes. The concept of Business Activity Monitoring...
Jan-Philipp Friedenstab, Christian Janiesch, Marti...
TVLSI
2008
105views more  TVLSI 2008»
13 years 7 months ago
Robust Concurrent Online Testing of Network-on-Chip-Based SoCs
Lifetime concerns for complex systems-on-a-chip (SoC) designs due to decreasing levels in reliability motivate the development of solutions to ensure reliable operation. A precurso...
Praveen Bhojwani, Rabi N. Mahapatra
BMCBI
2007
148views more  BMCBI 2007»
13 years 7 months ago
fREDUCE: Detection of degenerate regulatory elements using correlation with expression
Background: The precision of transcriptional regulation is made possible by the specificity of physical interactions between transcription factors and their cognate binding sites ...
Randy Z. Wu, Christina Chaivorapol, Jiashun Zheng,...