970 search results - page 7 / 194 » Symbolic timing simulation using cluster scheduling |
CHARME
2001
Springer
14 years 1 months ago
2001
Springer
Model checking is the process of verifying whether a model of a concurrent system satisfies a specified temporal property. Symbolic algorithms based on Binary Decision Diagrams (BD...
HPCA
2007
IEEE
14 years 10 months ago
2007
IEEE
Utilizing the nonuniform latencies of SDRAM devices, access reordering mechanisms alter the sequence of main memory access streams to reduce the observed access latency. Using a r...
JSSPP
2007
Springer
14 years 4 months ago
2007
Springer
Heterogeneous clusters and grid infrastructures are becoming increasingly popular. In these computing infrastructures, machines have different resources, including memory sizes, d...
ICCAD
1999
IEEE
14 years 2 months ago
1999
IEEE
We introduce a new method of verifying the timing of custom CMOS circuits. Due to the exponential number of patterns required, traditional simulation methods are unable to exhaust...
ICCD
1995
IEEE
14 years 1 months ago
1995
IEEE
– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...