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IJHPCA
2010
84views more  IJHPCA 2010»
13 years 6 months ago
Operation Stacking for Ensemble Computations With Variable Convergence
Sparse matrix operations achieve only small fractions of peak CPU speeds because of the use of specialized, indexbased matrix representations, which degrade cache utilization by i...
Mehmet Belgin, Godmar Back, Calvin J. Ribbens
CIKM
2010
Springer
13 years 5 months ago
Building efficient multi-threaded search nodes
Search nodes are single-purpose components of large Web search engines and their efficient implementation is critical to sustain thousands of queries per second and guarantee indi...
Carolina Bonacic, Carlos García, Mauricio M...
HPCA
2006
IEEE
14 years 8 months ago
A decoupled KILO-instruction processor
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a feasible and implementable design has been an elu...
Miquel Pericàs, Adrián Cristal, Rube...
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 4 months ago
Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques
— The need to perform power analysis in the early stages of the design process has become critical as power has become a major design constraint. Embedded and highperformance mic...
Xiaoyao Liang, Kerem Turgay, David Brooks
ICEBE
2009
IEEE
147views Business» more  ICEBE 2009»
14 years 2 months ago
The Design and Implementation of Service Reservations in Real-Time SOA
—Service-oriented architecture (SOA) provides the flexibility of dynamically composing business processes in enterprise computing. However, they must be enhanced to support real...
Mark Panahi, Weiran Nie, Kwei-Jay Lin