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LCPC
2004
Springer
14 years 29 days ago
Empirical Performance-Model Driven Data Layout Optimization
Abstract. Empirical optimizers like ATLAS have been very effective in optimizing computational kernels in libraries. The best choice of parameters such as tile size and degree of l...
Qingda Lu, Xiaoyang Gao, Sriram Krishnamoorthy, Ge...
MICRO
2003
IEEE
108views Hardware» more  MICRO 2003»
14 years 27 days ago
Reducing Design Complexity of the Load/Store Queue
With faster CPU clocks and wider pipelines, all relevant microarchitecture components should scale accordingly. There have been many proposals for scaling the issue queue, registe...
Il Park, Chong-liang Ooi, T. N. Vijaykumar
ICS
2009
Tsinghua U.
14 years 6 days ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
HPCA
1998
IEEE
13 years 12 months ago
The Impact of Data Transfer and Buffering Alternatives on Network Interface Design
The explosive growth in the performance of microprocessors and networks has created a new opportunity to reduce the latency of fine-grain communication. Microprocessor clock speed...
Shubhendu S. Mukherjee, Mark D. Hill
SP
2010
IEEE
158views Security Privacy» more  SP 2010»
13 years 11 months ago
Tamper Evident Microprocessors
Abstract—Most security mechanisms proposed to date unquestioningly place trust in microprocessor hardware. This trust, however, is misplaced and dangerous because microprocessors...
Adam Waksman, Simha Sethumadhavan