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» Synchronization and Communication in the T3E Multiprocessor
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PPOPP
1993
ACM
13 years 10 months ago
Integrating Message-Passing and Shared-Memory: Early Experience
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
David A. Kranz, Kirk L. Johnson, Anant Agarwal, Jo...
HPCA
2003
IEEE
14 years 7 months ago
Slipstream Execution Mode for CMP-Based Multiprocessors
Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism y...
Khaled Z. Ibrahim, Gregory T. Byrd, Eric Rotenberg
HPCA
2007
IEEE
14 years 7 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
SIBGRAPI
1999
IEEE
13 years 11 months ago
Parallelizing MPEG Video Encoding using Multiprocessors
Many computer applications are currently using digital video. Recent advances in digital imaging and faster networking infrastructure made this technology very popular, not only fo...
Joao Paulo Kitajima, Denilson Barbosa, Wagner Meir...
CJ
2006
84views more  CJ 2006»
13 years 6 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope