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ASYNC
1998
IEEE
71views Hardware» more  ASYNC 1998»
14 years 27 days ago
Towards Asynchronous A-D Conversion
Analogue to digital (A-D) converters with a xed conversion time are subject to errors due to metastability. These errors will occur in all converter designs with a bounded time fo...
D. J. Kinniment, Alexandre Yakovlev, Fei Xia, B. G...
ICCD
1991
IEEE
65views Hardware» more  ICCD 1991»
14 years 4 days ago
Self-Timed Logic Using Current-Sensing Completion Detection (CSCD)
This article proposes a completion-detection method for efficiently implementing Boolean functions as self-timed logic structures. Current-Sensing Completion Detection, CSCD, allow...
Mark E. Dean, David L. Dill, Mark Horowitz
DAC
2005
ACM
13 years 10 months ago
Timing-driven placement by grid-warping
Grid-warping is a recent placement strategy based on a novel physical analogy: rather than move the gates to optimize their location, it elastically deforms a model of the 2-D chi...
Zhong Xiu, Rob A. Rutenbar
ASYNC
1997
IEEE
140views Hardware» more  ASYNC 1997»
14 years 6 days ago
The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver
Abstract-This paper describes the design and verification of a high-performance asynchronous differential equation solver benchmark circuit. The design has low control overhead whi...
Kenneth Y. Yun, Ayoob E. Dooply, Julio Arceo, Pete...
ENTCS
2006
176views more  ENTCS 2006»
13 years 8 months ago
Automatic Formal Synthesis of Hardware from Higher Order Logic
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...