95 search results - page 10 / 19 » Synchronous Interlocked Pipelines |
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
FPL
2009
Springer
14 years 2 days ago
2009
Springer
As FPGA-based systems including soft processors become increasingly common, we are motivated to better understand the architectural trade-offs and improve the efficiency of these...
MIDDLEWARE
2001
Springer
13 years 12 months ago
2001
Springer
Abstract. Existing middleware is based on control-flow centric interaction models such as remote method invocations, poorly matching the structure of applications that process con...
SIGGRAPH
1994
ACM
13 years 11 months ago
1994
ACM
This paper describes the design and implementation of IRIS Performer, a toolkit for visual simulation, virtual reality, and other real-time 3D graphics applications. The principal...
ICPP
1993
IEEE
13 years 11 months ago
1993
IEEE
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...