95 search results - page 16 / 19 » Synchronous Interlocked Pipelines |
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract—This paper presents a low power 4-bit ADC for subGHz Ultra Wideband (UWB) receivers. The power efficiency is achieved by taking advantage of the low duty cycle feature o...
OTM
2007
Springer
14 years 1 months ago
2007
Springer
Software patterns have evolved into a commonly used means to design and implement software systems. Programming patterns, architecture and design patterns have been quite successfu...
ASYNC
2005
IEEE
14 years 1 months ago
2005
IEEE
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor ...
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...