In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
- Many software development platforms provide a large number of library components to make it easy to build high quality software. On the other hand, it became more and more diffic...
We describe Javaflow and Paraflow, the client and server parts of a digital library, providing high-performance data-retrieval and data-mining services, with emphasis on user in...
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
Fine grained concurrency and accurate timing can be essential for embedded hardware and software systems. These requirements should be reflected in the specification and must be c...