115 search results - page 16 / 23 » Synthesis of Asynchronous Hardware from Petri Nets |
QEST
2007
IEEE
14 years 1 months ago
2007
IEEE
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
CODES
2001
IEEE
13 years 11 months ago
2001
IEEE
Due to rapidly increasing system complexity, shortening time-tomarket, and growing demand for hard real-time systems, formal methods are becoming indispensable in the synthesis of...
ATVA
2006
Springer
13 years 11 months ago
2006
Springer
Chaining can reduce the number of iterations required for symbolic state-space generation and model-checking, especially in Petri nets and similar asynchronous systems, but require...
ISSS
2000
IEEE
13 years 12 months ago
2000
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
— This paper presents a fast analytical method for estimating the throughput of pipelined asynchronous systems, and then applies that method to develop a fast solution to the pro...