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» Synthesis of Non-Interferent Timed Systems
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ISPD
2003
ACM
88views Hardware» more  ISPD 2003»
14 years 25 days ago
Porosity aware buffered steiner tree construction
— In order to achieve timing closure on increasingly complex IC designs, buffer insertion needs to be performed on thousands of nets within an integrated physical synthesis syste...
Charles J. Alpert, Gopal Gandham, Milos Hrkic, Jia...
DATE
2010
IEEE
126views Hardware» more  DATE 2010»
13 years 11 months ago
Scenario-based analysis and synthesis of real-time systems using uppaal
Abstract. We propose an approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-process behaviors of a system are modeled as a set of driving uni...
Kim Guldstrand Larsen, Shuhao Li, Brian Nielsen, S...
CORR
2006
Springer
116views Education» more  CORR 2006»
13 years 7 months ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...
ICECCS
2000
IEEE
135views Hardware» more  ICECCS 2000»
13 years 12 months ago
Definitions of Equivalence for Transformational Synthesis of Embedded Systems
Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried ou...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
CODES
1998
IEEE
13 years 12 months ago
Communication synthesis and HW/SW integration for embedded system design
The implementation of codesign applications generally requires the use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Interfacing hardwar...
Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pega...