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FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
12 years 11 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
14 years 18 days ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
LCTRTS
2010
Springer
13 years 5 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla
ISPD
1997
ACM
74views Hardware» more  ISPD 1997»
13 years 11 months ago
A matrix synthesis approach to thermal placement
— In this paper, we consider the thermal placement problem for gate arrays. We introduce a new combinatorial optimization problem, matrix synthesis problem (MSP), to model the th...
Chris C. N. Chu, D. F. Wong
VIS
2003
IEEE
145views Visualization» more  VIS 2003»
14 years 8 months ago
Signed Distance Transform Using Graphics Hardware
This paper presents a signed distance transform algorithm using graphics hardware, which computes the scalar valued function of the Euclidean distance to a given manifold of co-di...
Christian Sigg, Markus H. Gross, Ronald Peikert