70 search results - page 4 / 14 » Synthesis of Speed Independent Circuits Based on Decompositi... |
DAC
1997
ACM
13 years 11 months ago
1997
ACM
In this paper, we introduce a Shared Multiple Rooted XORbased Decomposition Diagram XORDD to represent functions with multiple outputs. Based on the XORDD representation, we dev...
IPPS
1997
IEEE
13 years 11 months ago
1997
IEEE
Algebraic factorization is an extremely important part of any logic synthesis system but is computationally expensive. Hence it is important to look at parallel processing to spee...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
ASPDAC
2009
ACM
14 years 8 days ago
2009
ACM
Iterative retiming and resynthesis is a powerful way to optimize sequential circuits but its massive adoption has been hampered by the hardness of verification. This paper tackle...
ICCAD
2007
IEEE
14 years 1 months ago
2007
IEEE
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...