— More and more fieldbus applications require a communication with real-time properties, while still being economically feasible. The fieldbuses LIN and TTP/A take this require...
Martin Delvai, Ulrike Eisenmann, Wilfried Elmenrei...
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Background: Direct synthesis of genes is rapidly becoming the most efficient way to make functional genetic constructs and enables applications such as codon optimization, RNAi re...
Alan Villalobos, Jon E. Ness, Claes Gustafsson, Je...