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» Synthesis of networks on chips for 3D systems on chips
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PDP
2009
IEEE
14 years 3 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
TVLSI
2008
106views more  TVLSI 2008»
13 years 8 months ago
Efficient Distributed On-Chip Decoupling Capacitors for Nanoscale ICs
Abstract--A distributed on-chip decoupling capacitor network is proposed in this paper. A system of distributed on-chip decoupling capacitors is shown to provide an efficient solut...
Mikhail Popovich, Eby G. Friedman, Radu M. Secarea...
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 5 months ago
Performance Efficiency of Context-Flow System-on-Chip Platform
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
Rami Beidas, Jianwen Zhu
ISCA
2007
IEEE
106views Hardware» more  ISCA 2007»
14 years 3 months ago
Architectural implications of brick and mortar silicon manufacturing
We introduce a novel chip fabrication technique called “brick and mortar”, in which chips are made from small, pre-fabricated ASIC bricks and bonded in a designer-specified a...
Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, ...
ICCAD
2004
IEEE
64views Hardware» more  ICCAD 2004»
14 years 5 months ago
Simultaneous design and placement of multiplexed chemical processing systems on microchips
Microchip structures represent an attractive platform for microscale chemical processing of fluidic systems. However, standardized design methods for these devices have not yet b...
Anton J. Pfeiffer, Tamal Mukherjee, Steinar Hauan