419 search results - page 39 / 84 » Synthesis of networks on chips for 3D systems on chips |
VLSID
2006
IEEE
14 years 2 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
ARCS
2004
Springer
14 years 2 months ago
2004
Springer
: We investigated different parallel SIMD (single instruction multiple data) architectures based on pure programmable and reconfigurable approaches for their appropriateness for in...
JCSC
2002
13 years 8 months ago
2002
Memory accesses account for a large percentage of total power in microprocessor-based embedded systems. The increasing use of microprocessor cores and synthesis, rather than prefa...
JSA
2010
13 years 3 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
CDES
2008
13 years 10 months ago
2008
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...