419 search results - page 55 / 84 » Synthesis of networks on chips for 3D systems on chips |
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Technology Roadmap for Semiconductors (ITRS) clearly identifies the integration of electrochemical and electrobiological techniques as one of the system-level design challenges tha...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
—The paper presents architecture and synthesis results for an organic computing hardware for smart CMOS camera chips. The organic behavior in the chip hardware is based on distri...
FPL
2005
Springer
14 years 2 months ago
2005
Springer
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for Multi-Processor System-onChip (MPSoC) architectures. In an earlier paper we proposed a energ...
GECCO
2010
Springer
14 years 1 months ago
2010
Springer
The Spidergon interconnection network has become popular recently in multiprocessor systems on chips. To the best of our knowledge, algorithms for collective communications (CC) h...
SI3D
2003
ACM
14 years 1 months ago
2003
ACM
This paper describes shear-image order ray casting, a new method for volume rendering. This method renders sampled data in three dimensions with image quality equivalent to the be...