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» Synthesis of networks on chips for 3D systems on chips
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IPPS
1998
IEEE
14 years 26 days ago
NTI: A Network Time Interface M-Module for High-Accuracy Clock-Synchronization
This paper? provides a description of our Network Time Interface M-Module NTI supporting high-accuracy external clock synchronization by hardware. The NTI is built around our custo...
Martin Horauer, Ulrich Schmid, Klaus Schossmaier
HOTI
2005
IEEE
14 years 2 months ago
High-Speed and Low-Power Network Search Engine Using Adaptive Block-Selection Scheme
A partitioned TCAM-based search engine is presented that increases packet forwarding rate multiple times over traditional TCAMs. The model works for IPv4 and IPv6 packet forwardin...
Mohammad J. Akhbarizadeh, Mehrdad Nourani, Rina Pa...
IESS
2007
Springer
92views Hardware» more  IESS 2007»
14 years 2 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
COMPSEC
2008
116views more  COMPSEC 2008»
13 years 8 months ago
Enforcing memory policy specifications in reconfigurable hardware
While general-purpose processor based systems are built to enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reco...
Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timo...
WS
2008
ACM
13 years 8 months ago
Recommendations based on semantically enriched museum collections
This article presents the CHIP demonstrator5 for providing personalized access to digital museum collections. It consists of three main components: Art Recommender, Tour Wizard, an...
Yiwen Wang, Natalia Stash, Lora Aroyo, Peter Gorge...