Sciweavers

419 search results - page 83 / 84
» Synthesis of networks on chips for 3D systems on chips
Sort
View
DAC
2006
ACM
14 years 8 months ago
Prediction-based flow control for network-on-chip traffic
Networks-on-Chip (NoC) architectures provide a scalable solution to on-chip communication problem but the bandwidth offered by NoCs can be utilized efficiently only in presence of...
Ümit Y. Ogras, Radu Marculescu
ICALP
1998
Springer
13 years 11 months ago
Static and Dynamic Low-Congested Interval Routing Schemes
Interval Routing Schemes (IRS for short) have been extensively investigated in the past years with special emphasis on shortest paths. Besides their theoretical interest, IRS have...
Serafino Cicerone, Gabriele Di Stefano, Michele Fl...
CODES
2007
IEEE
14 years 1 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
TROB
2002
244views more  TROB 2002»
13 years 7 months ago
Distributed surveillance and reconnaissance using multiple autonomous ATVs: CyberScout
The objective of the CyberScout project is to develop an autonomous surveillance and reconnaissance system using a network of all-terrain vehicles. In this paper, we focus on two f...
Mahesh Saptharishi, C. Spence Oliver, Christopher ...
IEEEPACT
2008
IEEE
14 years 1 months ago
Feature selection and policy optimization for distributed instruction placement using reinforcement learning
Communication overheads are one of the fundamental challenges in a multiprocessor system. As the number of processors on a chip increases, communication overheads and the distribu...
Katherine E. Coons, Behnam Robatmili, Matthew E. T...