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» Synthesis of optimal switching logic for hybrid systems
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IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 4 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
IJCSS
2000
176views more  IJCSS 2000»
13 years 10 months ago
AI-based discrete sliding-mode control for real-time implementation
Combination of sliding-mode control and an AI block based on fuzzy logic is introduced. This hybrid control structure provides very good control performance and robustness of contr...
Vladimir B. Bajic, Daohang Sha, Xinzhong Li, Xingm...
AI
2007
Springer
14 years 4 months ago
Constructing a User Preference Ontology for Anti-spam Mail Systems
The judgment that whether an email is spam or non-spam may vary from person to person. Different individuals can have totally different responses to the same email based on their p...
Jongwan Kim, Dejing Dou, Haishan Liu, Donghwi Kwak
ASPDAC
2007
ACM
129views Hardware» more  ASPDAC 2007»
14 years 2 months ago
ECO-system: Embracing the Change in Placement
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
Jarrod A. Roy, Igor L. Markov
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 7 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson