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» Synthesis of quantum logic circuits
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EURODAC
1994
IEEE
123views VHDL» more  EURODAC 1994»
13 years 11 months ago
Testing redundant asynchronous circuits by variable phase splitting
An approach for stuck-at-i and delay-fault testing of redundant circuits without modifying the logic is proposed. The only requirement is the ability to control both phases of eac...
Luciano Lavagno, Antonio Lioy, Michael Kishinevsky
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
14 years 1 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
VTS
1996
IEEE
111views Hardware» more  VTS 1996»
13 years 11 months ago
Synthesis-for-scan and scan chain ordering
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...
Robert B. Norwood, Edward J. McCluskey
IPPS
1997
IEEE
13 years 11 months ago
A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis
Algebraic factorization is an extremely important part of any logic synthesis system but is computationally expensive. Hence it is important to look at parallel processing to spee...
Sumit Roy, Prithviraj Banerjee
DATE
2008
IEEE
124views Hardware» more  DATE 2008»
14 years 1 months ago
Logic Synthesis with Nanowire Crossbar: Reality Check and Standard Cell-based Integration
Nanowire crossbar is one of the most promising circuit solutions for nanoelectronics. We show nanowire crossbars do not scale well in terms of logic density and speed. We conseque...
Mian Dong, Lin Zhong