41 search results - page 5 / 9 » Synthesis of synchronous elastic architectures |
VLSI
2010
Springer
13 years 5 months ago
2010
Springer
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...
FSTTCS
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. We study the synthesis problem for external linear or branching specifications and distributed, synchronous architectures with arbitrary delays on processes. External mea...
SAC
2006
ACM
14 years 1 months ago
2006
ACM
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...