Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
We present Tor, a circuit-based low-latency anonymous communication service. This second-generation Onion Routing system addresses limitations in the original design by adding per...
Roger Dingledine, Nick Mathewson, Paul F. Syverson
We present an adaptive, feedback-based, energy estimation model for battery-powered embedded devices such as sensor network gateways and hand-held computers. Our technique maps ha...
This paper describes the implementation and testing of Alice, the California Institute of Technology's entry in the 2005 DARPA Grand Challenge. Alice utilizes a highly networ...
Lars B. Cremean, Tully B. Foote, Jeremy H. Gillula...
We propose a companion solution to iSCSI that is more suited for virtualization of local computer bus architectures, such as PCI/PCI-X and PCI Express. We explore the architecture ...