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» System Design Validation Using Formal Models
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DATE
2000
IEEE
132views Hardware» more  DATE 2000»
14 years 9 days ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
PRIMA
2009
Springer
14 years 2 months ago
Adaptation and Validation of an Agent Model of Functional State and Performance for Individuals
Human performance can seriously degrade under demanding tasks. To improve performance, agents can reason about the current state of the human, and give the most appropriate and eff...
Fiemke Both, Mark Hoogendoorn, S. Waqar Jaffry, Ri...
EUROPAR
2006
Springer
13 years 11 months ago
Hierarchical Model Validation of Symbolic Performance Models of Scientific Kernels
Multi-resolution validation of hierarchical performance models of scientific applications is critical primarily for two reasons. First, the step-by-step validation determines the c...
Sadaf R. Alam, Jeffrey S. Vetter
EUSFLAT
2003
110views Fuzzy Logic» more  EUSFLAT 2003»
13 years 9 months ago
Fuzzy-neuro risk assessment of distributed real-time systems through formal and object-oriented systems modelling
The purpose of this paper is to advocate and encourage the application of fuzzy-neuro algorithms in the risk assessment of Distributed Real-Time (DRT) systems, where object-orient...
Atoosa P.-J. Thunem
DATE
1998
IEEE
73views Hardware» more  DATE 1998»
14 years 5 days ago
A Formal Description of VHDL-AMS Analogue Systems
A formal definition of the general VHDLAMS analogue system has been proposed to relate the way in which the language affects the specification of a non-linear discontinuous analog...
Tom J. Kazmierski