452 search results - page 24 / 91 » System Level Hardware-Software Design Exploration with XCS |
MEMOCODE
2003
IEEE
14 years 2 months ago
2003
IEEE
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
The compositional computation of Pareto points in multi-dimensional optimization problems is an important means to efficiently explore the optimization space. This paper presents ...
CASES
2007
ACM
2007
ACM
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
14 years 29 days ago
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
ACSD
2003
IEEE
14 years 2 months ago
2003
IEEE
As modern embedded systems become more integrated and complex, it is crucial to be able to represent systems ple levels of abstraction, so that the design space can be effectively...