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» System Level Modelling for Hardware Software Systems
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117
Voted
SOSP
2009
ACM
15 years 11 months ago
Tolerating hardware device failures in software
Hardware devices can fail, but many drivers assume they do not. When confronted with real devices that misbehave, these assumptions can lead to driver or system failures. While ma...
Asim Kadav, Matthew J. Renzelmann, Michael M. Swif...
126
Voted
CODES
2006
IEEE
15 years 8 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
108
Voted
CHARME
2003
Springer
97views Hardware» more  CHARME 2003»
15 years 7 months ago
Convergence Testing in Term-Level Bounded Model Checking
We consider the problem of bounded model checking of systems expressed in a decidable fragment of first-order logic. While model checking is not guaranteed to terminate for an ar...
Randal E. Bryant, Shuvendu K. Lahiri, Sanjit A. Se...
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
15 years 8 months ago
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures
As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify ...
Nicolas Coste, Hubert Garavel, Holger Hermanns, Ri...
HOTOS
1999
IEEE
15 years 6 months ago
The Case for Higher-Level Power Management
Reducing the energy consumed in the use of computing devices is becoming a major design challenge. While the problem obviously must be addressed with improved low-level technology...
Carla Schlatter Ellis