Sciweavers

12333 search results - page 24 / 2467
» System Level Modelling for Hardware Software Systems
Sort
View
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
14 years 1 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
FPT
2005
IEEE
198views Hardware» more  FPT 2005»
14 years 2 months ago
From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
Wolfgang Klingauf, Robert Günzel
ICCAD
2001
IEEE
256views Hardware» more  ICCAD 2001»
14 years 6 months ago
An Analytical High-Level Battery Model for Use in Energy Management of Portable Electronic Systems
Once the battery becomes fully discharged, a battery-powered portable electronic system goes off-line. Therefore, it is important to take the battery behavior into account. A syst...
Daler N. Rakhmatov, Sarma B. K. Vrudhula
LISA
2007
13 years 11 months ago
PoDIM: A Language for High-Level Configuration Management
The high rate of requirement changes make system administration a complex task. This complexity is further influenced by the increasing scale, unpredictable behaviour of software ...
Thomas Delaet, Wouter Joosen
FCCM
2006
IEEE
107views VLSI» more  FCCM 2006»
14 years 3 months ago
Hardware/Software Integration for FPGA-based All-Pairs Shortest-Paths
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
Uday Bondhugula, Ananth Devulapalli, James Dinan, ...