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CAL
2010
13 years 6 months ago
A Case for Alternative Nested Paging Models for Virtualized Systems
Address translation often emerges as a critical performance bottleneck for virtualized systems and has recently been the impetus for hardware paging mechanisms. These mechanisms ap...
Giang Hoang, Chang Bae, Jack Lange, Lide Zhang, Pe...
FASE
2010
Springer
14 years 4 months ago
Performance Modeling and Analysis of Context-Aware Mobile Software Systems
Abstract. Context-awareness is becoming a first class attribute of software systems. In fact, applications for mobile devices need to be aware of their context in order to adapt t...
Luca Berardinelli, Vittorio Cortellessa, Antinisca...
ASPDAC
1995
ACM
111views Hardware» more  ASPDAC 1995»
14 years 26 days ago
A hardware-software co-simulator for embedded system design and debugging
One of the interesting problems in hardware-software co-design is that of debugging embedded software in conjunction with hardware. Currently, most software designers wait until a...
A. Ghosh, M. Bershteyn, R. Casley, C. Chien, A. Ja...
DATE
2006
IEEE
147views Hardware» more  DATE 2006»
14 years 3 months ago
Quantitative analysis of transaction level models for the AMBA bus
The increasing complexity of embedded systems pushes system designers to higher levels of abstraction. Transaction Level Modeling (TLM) has been proposed to model ation in systems...
Gunar Schirner, Rainer Dömer
DSD
2008
IEEE
124views Hardware» more  DSD 2008»
14 years 3 months ago
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...