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» System Level Modelling for Hardware Software Systems
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COMPSAC
2009
IEEE
14 years 2 months ago
Tool Support for Design Pattern Recognition at Model Level
Given the rapid rise of model-driven software development methodologies, it is highly desirable that tools be developed to support the use of design patterns in this context. This...
Hong Zhu, Ian Bayley, Lijun Shan, Richard Amphlett
CODES
2006
IEEE
14 years 1 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
EGH
2003
Springer
14 years 2 months ago
Automatic shader level of detail
Current graphics hardware can render procedurally shaded objects in real-time. However, due to resource and performance limitations, interactive shaders can not yet approach the c...
Marc Olano, Bob Kuehne, Maryann Simmons
DATE
2006
IEEE
157views Hardware» more  DATE 2006»
14 years 3 months ago
Modeling and simulation of mobile gateways interacting with wireless sensor networks
Sensor networks are emerging wireless technologies; their integration with the existing 2.5G, 3G mobile networks is a key issue to provide advanced services, e.g., health control....
Franco Fummi, Davide Quaglia, Fabio Ricciato, Maur...
CADE
2012
Springer
11 years 11 months ago
EPR-Based Bounded Model Checking at Word Level
We propose a word level, bounded model checking (BMC) algorithm based on translation into the effectively propositional fragment (EPR) of firstorder logic. This approach to BMC al...
Moshe Emmer, Zurab Khasidashvili, Konstantin Korov...