5744 search results - page 64 / 1149 » System level design, a VHDL based approach |
181
click to vote
CADE
2012
Springer
13 years 8 months ago
2012
Springer
We propose a word level, bounded model checking (BMC) algorithm based on translation into the effectively propositional fragment (EPR) of firstorder logic. This approach to BMC al...
170
click to vote
DAC
2001
ACM
16 years 7 months ago
2001
ACM
The quality of synthesis results for most high level synthesis approaches is strongly a ected by the choice of control ow through conditions and loops in the input description. In...
161
click to vote
EMSOFT
2010
Springer
15 years 4 months ago
2010
Springer
SystemC is the de facto standard for modeling embedded systems. It allows system design at various levels of abstractions, provides typical object-orientation features and incorpo...
141
click to vote
ICPP
1993
IEEE
15 years 10 months ago
1993
IEEE
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
172
Voted
ICCD
2006
IEEE
16 years 3 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...