5744 search results - page 70 / 1149 » System level design, a VHDL based approach |
173
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ICASSP
2010
IEEE
15 years 6 months ago
2010
IEEE
In hands-free communications, speech received by a microphone is distorted by room reverberation that can reduce the intelligibility of speech. An approach to dereverberation is ï...
163
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DELTA
2002
IEEE
15 years 11 months ago
2002
IEEE
A new method for hierarchical fault simulation based on multi-level Decision Diagrams (DD) is proposed. We suppose that a register transfer (RT) level information along with gate-...
168
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EURODAC
1994
IEEE
15 years 10 months ago
1994
IEEE
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
168
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DATE
2000
IEEE
15 years 10 months ago
2000
IEEE
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
169
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TCOM
2010
15 years 4 months ago
2010
- Phase noise is a topic of theoretical and practical interest in electronic circuits. Although progress has been made in the characterization of its description, there are still c...