169 search results - page 17 / 34 » System level memory optimization for hardware-software co-de... |
APCSAC
2004
IEEE
14 years 6 days ago
2004
IEEE
Dynamic optimization presents opportunities for finding run-time bottlenecks and deploying optimizations in statically compiled programs. In this paper, we discuss our current impl...
CCGRID
2009
IEEE
14 years 3 months ago
2009
IEEE
In a cluster of multiple processors or cpu-cores, many processes may run on each compute node. Each process tends to issue contiguous I/O requests for snapshot, checkpointing or s...
BCS
2008
13 years 10 months ago
2008
This paper describes our approaches to raise the level of abstraction at which hardware suitable for accelerating computationally-intensive applications can be specified. Field-Pr...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
For embedded system development, several companies provide cross-platform development tools to aid in debugging, prototyping and optimization of programs. These are full system em...