Sciweavers

816 search results - page 87 / 164
» System-Level Power Performance Analysis for Embedded Systems...
Sort
View
INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 9 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
ICCD
2006
IEEE
118views Hardware» more  ICCD 2006»
14 years 6 months ago
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
Jinwen Xi, Peixin Zhong
CASES
2005
ACM
13 years 11 months ago
Hardware support for code integrity in embedded processors
Computer security becomes increasingly important with continual growth of the number of interconnected computing platforms. Moreover, as capabilities of embedded processors increa...
Milena Milenkovic, Aleksandar Milenkovic, Emil Jov...
WH
2010
171views Healthcare» more  WH 2010»
13 years 3 months ago
Evaluation of body sensor network platforms: a design space and benchmarking analysis
Body Sensor Networks (BSNs) consist of sensor nodes deployed on the human body for health monitoring. Each sensor node is implemented by interfacing a physiological sensor with a ...
Sidharth Nabar, Ayan Banerjee, Sandeep K. S. Gupta...
ECRTS
2007
IEEE
14 years 3 months ago
Cache-Aware Timing Analysis of Streaming Applications
Of late, there has been a considerable interest in models, algorithms and methodologies specifically targeted towards designing hardware and software for streaming applications. ...
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoud...