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» System-Level Verification - A Comparison of Approaches
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VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
14 years 7 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
DAWAK
2007
Springer
14 years 1 months ago
Automating the Schema Matching Process for Heterogeneous Data Warehouses
Abstract. A federated data warehouse is a logical integration of data warehouses applicable when physical integration is impossible due to privacy policy or legal restrictions. In ...
Marko Banek, Boris Vrdoljak, A. Min Tjoa, Zoran Sk...

Publication
280views
12 years 10 months ago
VADANA: A dense dataset for facial image analysis
Analysis of face images has been the topic of in-depth research with wide spread applications. Face recognition, verification, age progression studies are some of the topics under...
Gowri Somanath, Rohith MV, Chandra Kambhamettu
DAC
2008
ACM
14 years 8 months ago
Specify-explore-refine (SER): from specification to implementation
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based envir...
Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Dani...
BMCBI
2010
156views more  BMCBI 2010»
13 years 7 months ago
Comparative classification of species and the study of pathway evolution based on the alignment of metabolic pathways
Background: Pathways provide topical descriptions of cellular circuitry. Comparing analogous pathways reveals intricate insights into individual functional differences among speci...
Adi Mano, Tamir Tuller, Oded Béjà, R...