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» System-level power optimization: techniques and tools
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CODES
2005
IEEE
14 years 1 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
CORR
2007
Springer
153views Education» more  CORR 2007»
13 years 8 months ago
Power-Bandwidth Tradeoff in Dense Multi-Antenna Relay Networks
— We consider a dense fading multi-user network with multiple active multi-antenna source-destination pair terminals communicating simultaneously through a large common set of K ...
Ozgur Oyman, Arogyaswami Paulraj
UIST
2003
ACM
14 years 1 months ago
GADGET: a toolkit for optimization-based approaches to interface and display generation
Recent work is beginning to reveal the potential of numerical optimization as an approach to generating interfaces and displays. Optimization-based approaches can often allow a mi...
James Fogarty, Scott E. Hudson
IPPS
2007
IEEE
14 years 2 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
14 years 2 months ago
Implementing the Best Processor Cores
It is well-known that varying architectural, technological and implementation aspects of embedded microprocessors, such as ARM, can produce widely differing performance and power ...
Vamsi Boppana, Rahoul Varma, S. Balajee