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» SystemJ: A GALS language for system level design
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ITC
2003
IEEE
222views Hardware» more  ITC 2003»
14 years 23 days ago
Race: A Word-Level ATPG-Based Constraints Solver System For Smart Random Simulation
Functional verification of complex designs largely relies on the use of simulation in conjunction high-level verification languages (HVL) and test-bench automation (TBA) tools. In...
Mahesh A. Iyer
DSD
2010
IEEE
134views Hardware» more  DSD 2010»
13 years 7 months ago
A New High-Level Methodology for Programming FPGA-Based Smart Camera
Due to the various devices composing a smart camera system, various languages have to be known by the designer (like HDL and C/C++). Most of vision applications designers are soft...
Nicolas Roudel, François Berry, Jocelyn S&e...
ICFP
2006
ACM
14 years 7 months ago
Static analysis for syntax objects
We describe an s-expression based syntax-extension framework much like Scheme macros, with a key additional facility: the ability to define static semantics, such as type systems ...
David Fisher, Olin Shivers
SCCC
2008
IEEE
14 years 1 months ago
A Domain Specific Language for the Development of Collaborative Systems
Domain-Specific Languages (DSLs) are high level languages defined for combining expressivity and simplicity by means of constructs which are close to the problem domain and distan...
Luis Mariano Bibbo, Diego García, Claudia P...
MEMOCODE
2008
IEEE
14 years 1 months ago
Virtual prototyping AADL architectures in a polychronous model of computation
While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both...
Ma Yue, Jean-Pierre Talpin, Thierry Gautier